Vanue：Meeting Room 201, Agora Garden      

Date and Hours : Apr. 18, 2008 9:00a.m.~4:30p.m.

Agenda:

09:00 - 09:30 Registration

09:30 - 09:40 Welcome
--Tric Chiang, AP Field Platform Marketing - SPB, Cadence

09:40 - 10:00 Opening
--Willis Chang, Country Manager of Cadence Taiwan

10:00 - 10:40 Keynote: Challenge for the SiP Design Methodology Innovation in Renesas Technology
--Toshiyasu Akiyama San, Deputy General Manager, Design Technology Div. LSI Product Technology Unit, Renesas Technology

10:40 - 11:20 Signal Design Flow for RF SiP Products
--Sam Wang, President, Chipsip Technology

11:20 - 12:00 EDA Solution for SiP Design
--Brad Griffin, Product Marketing Director, Cadence and Dave DeMaria, Senior Vice President, Apache Chip-Package-System Solutions

12:00 - 13:40 Lunch Break
　
13:40 - 14:20 Guest Speech 2: Advanced SiP Package Technology and Roadmap
--Dr. Hong, Vice President, ASE Inc.

14:20 - 14:40 Break

14:40 - 15:20 Guest Speech 3: SiP Design Experience Sharing
--David Chang, Vice President, Marketing, AirDio

15:20 - 16:00 Cadence RF and Digitial SiP Kit (demo)
--Charlie Shih and Thunder Lay, Cadnece

16:00 - 16:30 Wrap-up
--Tric Chiang, AP Field Platform Marketing - SPB, Cadence

16:30 Ending